1. Field of the Invention
This invention related to an integrated circuit structure. More particularly this invention relates to a process for forming a carbon-doped low k silicon oxide dielectric material on an integrated circuit structure.
2. Description of the Related Art
In the continuing reduction of scale in integrated circuit structures, both the width of metal interconnects or lines and the horizontal spacing between such metal lines on any particular level of such interconnects have become smaller and smaller. As a result, horizontal capacitance has increased between such conductive elements. This increase in capacitance, together with the vertical capacitance which exists between metal lines on different layers, results in loss of speed and increased cross-talk. As a result, reduction of such capacitance, particularly horizontal capacitance, has received much attention. One proposed approach to solving this problem of high capacitance is to replace the conventional silicon oxide (SiO2) dielectric material, having a dielectric constant (k) of about 4.0, with another dielectric material having a lower dielectric constant to thereby lower the capacitance.
In an article by L. Peters, entitled xe2x80x9cPursuing the Perfect Low-K Dielectricxe2x80x9d, published in Semiconductor International, Volume 21 No. 10, September 1998, at pages 64-74, a number of such alternate dielectric materials are disclosed and discussed. Included in these dielectric materials is a description of a low k carbon-doped silicon oxide dielectric material having a dielectric constant of about 3.0 formed using a chemical vapor deposition (CVD) process developed by Trikon Technologies of Newport, Gwent, U.K. The Trikon process is said to react methyl silane (CH3xe2x80x94SiH3) with hydrogen peroxide (H2O2) to form monosilicic acid which condenses on a cool wafer and is converted into an amorphous methyl-doped silicon oxide which is annealed at 400xc2x0 C. to remove moisture.
An article by S. McClatchie et al. entitled xe2x80x9cLow Dielectric Constant Oxide Films Deposited Using CVD Techniquesxe2x80x9d, published in the 1998 Proceedings of the Fourth International Dielectrics For ULSI Multilevel Interconnection Conference (Dumic) held on Feb. 16-17, 1998 at Santa Clara, Calif., at pages 311-318, also describes the formation of methyl-doped silicon oxide by the low-k Flowfill process of reacting methyl silane with H2O2 to achieve a dielectric constant of xcx9c2.9.
The use of low k carbon-doped silicon oxide dielectric material formed by reacting methyl silane with hydrogen peroxide (the Trikon process) has been found to be capable of better gap filling characteristics than other low k materials. Good gap filling characteristics, in turn, can result in the formation of void-free filling of the high aspect ratio space between parallel closely spaced apart metal lines with dielectric material having a lower dielectric constant than that of convention silicon oxide, thereby resulting in a substantial lowering of the horizontal capacitance between such adjacent metal lines on the same metal wiring level.
However, it has been found that the formation of such low k carbon-doped silicon oxide dielectric materials by the Trikon process does not always result in complete filling of the gaps between, for example, closely spaced apart raised metal lines, and does not always adhere well to the underlying materials. Such materials are also sometimes found to have byproducts of the reaction trapped in the film. It would, therefore, be desirable to optimize the process to provide for a more reliable formation of a film of low k carbon-doped silicon oxide dielectric material possessing good gap filling characteristics, good adherence to underlying materials resulting in improved film strength, and having less byproducts trapped in the film.
The invention comprises an improved process for forming a low k carbon-doped silicon oxide dielectric material on an integrated circuit structure characterized by improved planarity and good gap fill in high aspect ratio regions of the integrated circuit structure, as well as improved film strength and adherence, and less byproducts trapped in the film. The process comprises: depositing a plurality of layers of low k carbon-doped silicon oxide dielectric material on an integrated circuit structure in a reactor; and pausing after depositing each layer of low k carbon-doped silicon oxide dielectric material and before depositing a further layer of low k carbon-doped silicon oxide dielectric material.
In one aspect the process further includes first forming a base or barrier layer of a silicon-rich and nitrogen-rich dielectric material over the integrated circuit structure, plasma etching the upper surface of the barrier layer to facilitate adhesion of the subsequently deposited low k carbon-doped silicon oxide dielectric material to the barrier layer, and then, before depositing the first layer of low k carbon-doped silicon oxide dielectric material, cooling the etched barrier layer down to within 10xc2x0 C. or less of the subsequent deposition temperature used for formation of the film of low k carbon-doped silicon oxide dielectric material.
In another aspect of the invention the pausing step further includes, before deposition of the next layer of low k carbon-doped silicon oxide dielectric material, flowing a source of non-reactive gas over the surface of the newly deposited layer of low k carbon-doped silicon oxide dielectric material to facilitate outgassing and removal of byproducts resulting from the preceding formation and deposition of the newly formed layer of low k carbon-doped silicon oxide dielectric material.